Refer the given figure. The outputs (Q0â€“Q3) of the memory are always LOW. The address lines (A0â€“A7) are checked with a logic probe and all are indicating pulse activity, except forÂ A3, which shows a constant HIGH, andÂ A7, which shows a constant LOW;

Refer the given figure. The outputs (Q0–Q3) of the memory are always LOW. The address lines (A0–A7) are checked with a logic probe and all are indicating pulse activity, except for A3, which shows a constant HIGH, and A7, which shows a constant LOW; the select lines, are checked and shows pulse activity, while indicates a constant HIGH. What is wrong, and how can the memory be tested to determine whether it is defective or if the external circuitry is defective?

mcq12_1020_4

[A].	One of the inputs to the active-LOW select AND gate may be stuck high for some reason; take both select lines LOW and check for pulse activity on the outputs, Q0â€“Q3. If the outputs now respond, the problem is most likely in the program or circuitry driving the select lines.
[B].	The problem appears to be in the two address lines that never change levels; the problem is probably in the program driving the memory address bus.
[C].	The output buffers are probably defective since they are all tied together; the common input line is most likely stuck LOW. Change the output buffer IC.
[D].	Since no data appears to be getting through to the output buffers, the problem may be in the X decoder; change the X decoder IC.

Answer: Option A

Explanation:

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Refer the given figure. The outputs (Q0â€“Q3) of the memory are always LOW. The address lines (A0â€“A7) are checked with a logic probe and all are indicating pulse activity, except forÂ A3, which shows a constant HIGH, andÂ A7, which shows a constant LOW;

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