Flip-Flops - General Questions

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Flip-Flops - General Questions

Four J-K flip-flops are cascaded with their J-K inputs tied HIGH. If the input frequency (f_in) to the first flip-flop is 32 kHz, the output frequency (f_out) is ________.

A.	1 kHz
B.	2 kHz
C.	4 kHz
D.	16 kHz

Answer: Option C

Explanation:

No answer description available for this question

If both inputs of an S-R flip-flop are LOW, what will happen when the clock goes high?

A.	No change will occur in the output.
B.	An invalid state will exist.
C.	The output will toggle.
D.	The output will reset.

Answer: Option A

Explanation:

No answer description available for this question

An active-HIGH input S-R latch has a 1 on the S input and a 0 on the R input. What state is the latch in?

A.
B.
C.
D.

Answer: Option A

Explanation:

No answer description available for this question

For an S-R flip-flop to be set or reset, the respective input must be:

A.	installed with steering diodes
B.	in parallel with a limiting resistor
C.	LOW
D.	HIGH

Answer: Option D

Explanation:

No answer description available for this question

The pulse width of a one-shot circuit is determined by ________.

A.	a resistor and capacitor
B.	two resistors
C.	two capacitors
D.	none of the above

Answer: Option A

Explanation:

No answer description available for this question.

A 555 timer is connected for astable operation as shown below along with the output waveform. It is determined that the duty cycle should be 0.5. What steps need to be taken to correct the duty cycle, while maintaining the same output frequency?

mcq5_1020_1

A.	Increase the value of C.
B.	Increase Vcc and decrease RL.
C.	Decrease R1 and R2.
D.	Decrease R1 and increase R2.

Answer: Option D

Explanation:

No answer description available for this question

A push-button switch is used to input data to a register. The output of the register is erratic. What could be causing the problem?

A.	The power supply is probably noisy.
B.	The switch contacts are bouncing.
C.	The socket contacts on the register IC are corroded.
D.	The register IC is intermittent and failure is imminent.

Answer: Option B

Explanation:

No answer description available for this question.

The circuit given below fails to function; the inputs are checked with a logic probe and the following indications are obtained: CLK, J1, J2, J3, K1, K2, and K3 are pulsing. Q and clr are HIGH. mca5_1018a1 and PRE are LOW. What could be causing the problem?

mcq5_1017_1

A.	There is no problem.
B.	The clock should be held HIGH.
C.	The PRE is stuck LOW.
D.	The CLR is stuck HIGH.

Answer: Option C

Explanation:

No answer description available for this question.

Flip-Flops - General Questions

Flip-Flops - General Questions

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