Memory and Storage - General Questions

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Memory and Storage - General Questions

1.

Address decoding for dynamic memory chip control may also be used for:

A.	controlling refresh circuits
B.	read and write control
C.	chip selection and address location
D.	memory mapping

Answer: Option C

Explanation:

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2.

Which of the following describes the action of storing a bit of data in a mask ROM?

A.	A 1 is stored in a bipolar cell by opening the base connection to the address line.
B.	A 0 is stored in a bipolar cell by shorting the base connection to the address line.
C.	A 1 is stored by connecting the gate of a MOS cell to the address line.
D.	A 0 is stored by connecting the gate of a MOS cell to the address line.

Answer: Option C

Explanation:

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3.

The main advantage of semiconductor RAM is its ability to:

A.	retain stored data when power is interrupted or turned off
B.	be written to and read from rapidly
C.	be randomly accessed
D.	be sequentially accessed

Answer: Option B

Explanation:

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4.

Which of the following is one of the basic characteristics of DRAMs?

A.	DRAMs must have a constantly changing input.
B.	DRAMs must be periodically refreshed in order to be able to retain data.
C.	DRAMs have a broader "dynamic" storage range than other types of memories.
D.	DRAMs are simpler devices than other types of memories.

Answer: Option B

Explanation:

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5.

What is the bit storage capacity of a ROM with a 1024 × 8 organization?

A.	1024
B.	2048
C.	4096
D.	8192

Answer: Option D

Explanation:

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6.

Describe the timing diagram of a write operation.

A.	First the data is set on the data bus and the address is set, then the write pulse stores the data.
B.	First the address is set, then the data is set on the data bus, and finally the read pulse stores the data.
C.	First the write pulse stores the data, then the address is set, and finally the data is set on the data bus.
D.	First the data is set on the data bus, then the write pulse stores the data, and finally the address is set.

Answer: Option A

Explanation:

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7.

L1 is known as ________.

A.	primary cache
B.	secondary cache
C.	DRAM
D.	SRAM

Answer: Option A

Explanation:

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8.

EEPROM stands for ________.

A.	encapsulated electrical programmable read-only memory
B.	elementary electrical programmable read-only memory
C.	electrically erasable programmable read-only memory
D.	elementary erasable programmable read-only memory

Answer: Option C

Explanation:

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