Flip-Flops - General Questions (7)

On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when ________.

An RC circuit used in a nonretriggerable 74121 one-shot has an R_EXT of 49 k and a C_EXT of 0.2 F. The pulse width (t_W) is approximately ________.

The toggle condition in a master-slave J-K flip-flop means that Q and  will switch to their ________ state(s) at the ________.

A J-K flip-flop with J = 1 and K = 1 has a 20 kHz clock input. The Q output is ________.

What does the triangle on the clock input of a J-K flip-flop mean?

Which of the following describes the operation of a positive edge-triggered D flip-flop?

A correct output is achieved from a master-slave J-K flip-flop only if its inputs are stable while the:

A J-K flip-flop is in a "no change" condition when ________.