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Shift Registers - General Questions (3)

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Shift Registers - General Questions

17. 

Ring shift and Johnson counters are:

A. synchronous counters
B. aynchronous counters
C. true binary counters
D. synchronous and true binary counters

Answer: Option A

Explanation:

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18. 

When an 8-bit serial in/serial out shift register is used for a 20 s time delay, the clock frequency is ________.

A. 40 kHz
B. 50 kHz
C. 400 kHz
D. 500 kHz

Answer: Option C

Explanation:

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19. 

What type of register would have a complete binary number shifted in one bit at a time and have all the stored bits shifted out one at a time?

A. parallel-in, parallel-out
B. parallel-in, serial-out
C. serial-in, parallel-out
D. serial-in, serial-out

Answer: Option C

Explanation:

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20. 

By adding recirculating lines to a 4-bit parallel-in, serial-out shift register, it becomes a ________, ________, and ________-out register.

A. parallel-in, serial, parallel
B. serial-in, parallel, serial
C. series-parallel-in, series, parallel
D. bidirectional in, parallel, series

Answer: Option A

Explanation:

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21. 

The group of bits 10110111 is serially shifted (right-most bit first) into an 8-bit parallel output shift register with an initial state 11110000. After two clock pulses, the register contains ________.

A. 10111000
B. 10110111
C. 11110000
D. 11111100

Answer: Option D

Explanation:

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22. 

In a parallel in/parallel out shift register, D0 = 1, D1 = 1, D2 = 1, and D3 = 0. After three clock pulses, the data outputs are ________.

A. 1110
B. 0001
C. 1100
D. 1000

Answer: Option B

Explanation:

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23. 

A bidirectional 4-bit shift register is storing the nibble 1110. Its rightleft input is LOW. The nibble 0111 is waiting to be entered on the serial data-input line. After two clock pulses, the shift register is storing ________.

A. 1110
B. 0111
C. 1000
D. 1001

Answer: Option D

Explanation:

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24. 

When is it important to use a three-state buffer?

A. when two or more outputs are connected to the same input
B. when all outputs are normally HIGH
C. when all outputs are normally LOW
D. when two or more outputs are connected to two or more inputs

Answer: Option A

Explanation:

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