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Programmable Logic Device - General Questions (5)

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Programmable Logic Device - General Questions

33. 

A PAL16L8 has:

A. 10 inputs and 8 outputs.
B. 8 inputs and 8 outputs.
C. 16 inputs and 16 outputs.
D. 16 inputs and 8 outputs.

Answer: Option A

Explanation:

No answer description available for this question.

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34. 

Field-programmable gate arrays (FGPAs) use ________ memory technology, which is ________.

A. DRAM, nonvolatile
B. SRAM, nonvolatile
C. SRAM, volatile
D. RAM, volatile

Answer: Option C

Explanation:

No answer description available for this question.

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35. 

Which of the following testing procedures has one or more external moving parts?

A. Bed-of-nails
B. Flying probe
C. EXTEST
D. Boundary scan

Answer: Option B

Explanation:

No answer description available for this question

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36. 

In an OLMC, where does the FMUX signal go?

A. OMUX
B. D flip-flop
C. Matrix
D. PAL

Answer: Option C

Explanation:

No answer description available for this question

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37. 

Which one of the following is an embedded function of the Stratix II FPGA?

A. AND-OR logic
B. Programmable SOP
C. Digital signal processing
D. None of the above

Answer: Option C

Explanation:

No answer description available for this question.

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38. 

PIA is an acronym for ________.

A. Programmable Interface Array
B. Post Integrated Array
C. Programmable Input Array
D. Programmable Interconnect Array

Answer: Option D

Explanation:

No answer description available for this question

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39. 

What does the Altera FLEX10K PLD use in place of AND and OR arrays?

A. Nothing, it uses AND and OR arrays.
B. Look-up tables
C. SRAM-based memory
D. HPLD architecture

Answer: Option B

Explanation:

No answer description available for this question.

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40. 

By adding an OR gate to a simple programmable logic device (SPLD) the foundation for a(n) ________ is made possible.

A. PAL
B. PLA
C. CPLD
D. EEPROM

Answer: Option A

Explanation:

No answer description available for this question.

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