Digital System Projects Using HDL - General Questions (2)

Directions to Solve

Digital System Projects Using HDL - General Questions

9.

In the frequency counter, when is the new count stored in the display register?

A.	After disabling the counter
B.	When the count buffer is full
C.	After the sample interval is set
D.	When the timing and control block has put it there

Answer: Option A

Explanation:

No answer description available for this question.

10.

Which is not a step in strategic planning for HDL development?

A.	There must be a way to test each piece.
B.	Each block must fit together to make up the whole system.
C.	The names of each input and output must be known.
D.	The exact operation of each block must be thoroughly defined and understood.

Answer: Option C

Explanation:

No answer description available for this question.

11.

What must a stepper motor HDL application include?

A.	Variables and processes
B.	Types and bits
C.	Counters and decoders
D.	Sequencers and multiplexers

Answer: Option C

Explanation:

No answer description available for this question.

12.

In the frequency counter, if the clock generator produces a 100 kHz system clock signal, how many decade counters are required to measure 1 Hz?

A.	6
B.	5
C.	4
D.	3

Answer: Option B

Explanation:

No answer description available for this question.

13.

The accuracy of the frequency counter depends on the:

A.	system clock frequency.
B.	number of displayed digits.
C.	sampling rate.
D.	display update rate.

Answer: Option A

Explanation:

No answer description available for this question.

14.

What does the major block of an HDL code emulation of a keypad include?

A.	A sequencer
B.	A clock
C.	A multiplexer
D.	A ring counter

Answer: Option D

Explanation:

No answer description available for this question.

15.

Why should a real hardware functional test be performed on the HDL stepper motor design?

A.	To check the speed of the software
B.	To check the current levels in the motor
C.	To check the voltage levels of the real outputs
D.	To provide a fully operational system

Answer: Option A

Explanation:

No answer description available for this question.

16.

In the digital clock project, what is the frequency of the MOD-6 counter in the minutes section?

A.	1 pulse per minute
B.	6 pulses per minute
C.	10 pulses per minute
D.	1 pulse per hour

Answer: Option D

Explanation:

No answer description available for this question.

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