Combinational Logic Circuits - General Question (3)

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Combinational Logic Circuits - General Questions

17.

Which of the following expressions is in the sum-of-products form?

A.	(A + B)(C + D)
B.	(AB)(CD)
C.	AB(CD)
D.	AB + CD

Answer: Option D

Explanation:

No answer description available for this question

18.

In HDL, LITERALS is/are:

A.	digital systems.
B.	scalars.
C.	binary coded decimals.
D.	a numbering system.

Answer: Option B

Explanation:

No answer description available for this question

19.

What is the indication of a short on the input of a load gate?

A.	Only the output of the defective gate is affected.
B.	There is a signal loss to all gates on the node.
C.	The affected node will be stuck in the LOW state.
D.	There is a signal loss to all gates on the node, and the affected node will be stuck in the LOW state.

Answer: Option D

Explanation:

No answer description available for this question

20.

Based on the indications of probe A in the figure given below, what is wrong, if anything, with the circuit?

mcq4_1022_1

A.	The logic probe is unable to determine the state of the circuit at that point and is blinking to alert the technician to the problem.
B.	The output appears to be shorted to Vcc, but is being pulsed by the pulser.
C.	The output appears to be LOW, but is being pulsed by the pulser.
D.	Nothing appears to be wrong at that point.

Answer: Option D

Explanation:

No answer description available for this question

21.

What will a design engineer do after he/she is satisfied that the design will work?

A.	Put it in a flow chart
B.	Program a chip and test it
C.	Give the design to a technician to verify the design
D.	Perform a vector test

Answer: Option B

Explanation:

No answer description available for this question

22.

Looping on a K-map always results in the elimination of:

A.	variables within the loop that appear only in their complemented form.
B.	variables that remain unchanged within the loop.
C.	variables within the loop that appear in both complemented and uncomplemented form.
D.	variables within the loop that appear only in their uncomplemented form.

Answer: Option C

Explanation:

No answer description available for this question

23.

Each "1" entry in a K-map square represents:

A.	a HIGH for each input truth table condition that produces a HIGH output.
B.	a HIGH output on the truth table for all LOW input combinations.
C.	a LOW output for all possible HIGH input conditions.
D.	a DON'T CARE condition for all possible input truth table combinations.

Answer: Option A

Explanation:

No answer description available for this question.

24.

Two 4-bit binary numbers (1011 and 1111) are applied to a 4-bit parallel adder. The carry input is 1. What are the values for the sum and carry output?

A.	4321 = 0111, Cout = 0
B.	4321 = 1111, Cout = 1
C.	4321 = 1011, Cout = 1
D.	4321 = 1100, Cout = 1

Answer: Option C

Explanation:

No answer description available for this question.

Combinational Logic Circuits - General Question (3)

Combinational Logic Circuits - General Questions

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