Flip-Flops and Timers - General Questions (1)

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Flip-Flops and Timers - General Questions

What is one disadvantage of an S-R flip-flop?

A.	It has no Enable input.
B.	It has a RACE condition.
C.	It has no clock input.
D.	It has only a single output.

Answer: Option B

Explanation:

No answer description available for this question

Which of the following describes the operation of a positive edge-triggered D-type flip-flop?

A.	If both inputs are HIGH, the output will toggle.
B.	The output will follow the input on the leading edge of the clock.
C.	When both inputs are LOW, an invalid state exists.
D.	The input is toggled into the flip-flop on the leading edge of the clock and is passed to the output on the trailing edge of the clock.

Answer: Option B

Explanation:

No answer description available for this question

What is the significance of the J and K terminals on the J-K flip-flop?

A.	There is no known significance in their designations.
B.	The J represents "jump," which is how the Q output reacts whenever the clock goes HIGH and the J input is also HIGH.
C.	The letters represent the initials of Johnson and King, the co-inventors of the J-K flip-flop.
D.	All of the other letters of the alphabet are already in use.

Answer: Option A

Explanation:

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The truth table for an S-R flip-flop has how many VALID entries?

A.	3
B.	1
C.	4
D.	2

Answer: Option A

Explanation:

What is another name for a one-shot?

A.	monostable
B.	bistable
C.	astable
D.	tristable

Answer: Option A

Explanation:

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An astable multivibrator is a circuit that:

A.	has two stable states
B.	is free-running
C.	produces a continuous output signal
D.	is free-running and produces a continuous output signal

Answer: Option C

Explanation:

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The equation for the output frequency of a 555 timer operating in the astable mode is mcq24_1009_1 What value of C₁ will be required if R₁ = 1 k omega , R₂ = 1 k omega , and f = 1 kHz?

A.	0.33
B.	0.48 F
C.	480 F
D.	33 nF

Answer: Option B

Explanation:

No answer description available for this question

If both inputs of an S-R NAND latch are LOW, what will happen to the output?

A.	The output would become unpredictable.
B.	The output will toggle.
C.	The output will reset.
D.	No change will occur in the output.

Answer: Option A

Explanation:

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Flip-Flops and Timers - General Questions (1)

Flip-Flops and Timers - General Questions

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