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Field Effect Transistors (FET) - General Questions (3)

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Field Effect Transistors (FET) - General Questions

17. 

When an input signal reduces the channel size, the process is called:

A. enhancement
B. substrate connecting
C. gate charge
D. depletion

Answer: Option D

Explanation:

No answer description available for this question. 

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18. 

With a 30-volt VDD, and an 8-kilohm drain resistor, what is the E-MOSFET Q point voltage, with ID = 3 mA?

A. 6 V
B. 10 V
C. 24 V
D. 30 V

Answer: Option A

Explanation:

No answer description available for this question

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19. 

With the E-MOSFET, when gate input voltage is zero, drain current is 

A. at saturation
B. zero
C. IDSS
D. widening the channel

Answer: Option B

Explanation:

No answer description available for this question

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20. 

With the E-MOSFET, when gate input voltage is zero, drain current is:

A. at saturation
B. zero
C. IDSS
D. widening the channel

Answer: Option B

Explanation:

No answer description available for this question.

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21. 

A very simple bias for a D-MOSFET is called:

A. self biasing
B. gate biasing
C. zero biasing
D. voltage-divider biasing

Answer: Option C

Explanation:

No answer description available for this question

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22. 

JFET terminal "legs" are connections to the drain, the gate, and the:

A. channel
B. source
C. substrate
D. cathode

Answer: Option B

Explanation:

No answer description available for this question

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23. 

What is the input impedance of a common-gate configured JFET?

A. very low
B. low
C. high
D. very high

Answer: Option A

Explanation:

No answer description available for this question

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24. 

IDSS can be defined as:

A. the minimum possible drain current
B. the maximum possible current with VGS held at –4 V
C. the maximum possible current with VGS held at 0 V
D. the maximum drain current with the source shorted

Answer: Option C

Explanation:

No answer description available for this questio

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