Sample-and-hold circuits in ADCs are designed to:

1. 

Sample-and-hold circuits in ADCs are designed to:
[A]. sample and hold the output of the binary counter during the conversion process
[B]. stabilize the ADCs threshold voltage during the conversion process
[C]. stabilize the input analog signal during the conversion process
[D]. sample and hold the ADC staircase waveform during the conversion process

Answer: Option C

Explanation:

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